Deposits of tin, lead and alloys of these two metals are extensively used in a wide variety of functional and decorative applications. For example, many decorative and functional articles are covered with tin, lead or alloys of these metals to prevent tarnishing, surface corrosion, etc., or to provide a shiny lusterous surface. Also, such surfaces are often used for bearing contact surfaces to provide lubrication and reduce friction.
An increasingly important use of such deposits is in electronic circuits, electronic devices and electrical connectors. The surface layers of tin, lead and alloys are used as protective layers to prevent corrosion or in a patterning procedure during the fabrication or printed circuits or integrated circuits. Also, such layers are used to maintain good surface electrical contact. The layers are also used to provide chemically stable surfaces for soldering. This is done both on wires and on printed wire boards (or other substrates for electric and integrated circuits) to facilitate rapid mechanical and electrical connections.
It is highly desirable to obtain smooth, level, bright electroplatings of tin, lead and alloys of these metals as rapidly as possible. In addition, it is desirable to have relatively constant plating thickness so as to insure complete coverage without excessive build-up of plating thickness.
Smooth, bright platings are desirable for aesthetic reasons and to minimize porosity for a given plating thickness. Such platings are also advantageous for electrical contact applications. Absence of dendrites or needle growth precludes chances of electrical shorts from needles broken off the surface or electrical bridges across insulator spaces between conductors. Indeed, with the close dimensional tolerances required in modern integrated circuits, absence of dendritic growth is often absolutely essential to such applications.
Constant plating thickness also reduces etching problems especially where close tolerances are involved. Etching procedures are extensively used in the fabrication of electrical circuits including integrated circuits. These etching procedures are often used to produce various patterns or masks in the fabrication procedure. Etching times often depend on the thickness of the layer being etched. Thickness variations in the tin/lead deposit results in etching times that are not constant, and are not easily predicted particularly from sample to sample or area to area in the same sample. Where very intricate patterns are desired with high tolerances, it is highly desirable to have constant thickness of the tin/lead plating.
Various references have disclosed the use of additives to tin/lead electroplating solutions. Some of these references are: W. E. Rosenberg et al, U.S. Pat. No. 3,956,123, issued May 11, 1976; S. P. Valayil, U.S. Pat. No. 3,749,646, issued July 31, 1973; K. Nishihava, U.S. Pat. No. 3,661,730 issued May 9, 1972; B. D. Ostrow, et al, U.S. Pat. No. 4,000,047, issued Dec. 28, 1976; and W. E. Rosenberg, et al., U.S. Pat. No. 3,875,029, issued Apr. 1, 1975. Various plating procedures are described by A. Brenner in the book entitled, Electrodeposition of Alloys, Academic Press, 1963, particularly chapter 22, pages 4-27.